After a build and integration period of years, the Lab is ready to provide leading-edge logic and memory chip makers, as well as advanced materials and equipment suppliers access to the first prototype High NA EUV scanner (TWINSCAN EXE:5000) and surrounding processing and metrology tools.
The opening of the joint ASML-imec High NA EUV Lab prepares for High NA EUV for high-volume manufacturing – anticipated to happen in the 2025–2026 timeframe.
By giving leading-edge logic and memory chip manufacturers access to the High NA EUV prototype scanner and surrounding tools (which include a coat and development track, metrology tools, wafer and mask handling systems), imec and ASML support them in de-risking the technology and develop private High NA EUV use cases before the scanners will be operational in their production fabs.
Access will also be provided to the broader ecosystem of material and equipment suppliers and to imec’s High NA patterning program.
Readying the 0.55 NA EUV scanner and infrastructure followed intense preparations that started in 2018.
In this time span, ASML and ZEISS were able to develop High NA EUV scanner specific solutions related to the source, optics, lens anamorphicity, stitching, reduced depth of focus, edge placement errors and overlay accuracy.
Meanwhile, imec, in tight collaboration with its extended supplier network, prepared the patterning ecosystem, including the development of advanced resist and underlayer materials, photomasks, metrology and inspection techniques, (anamorphic) imaging strategies, optical proximity correction (OPC), and integrated patterning and etch techniques.
The preparatory work recently resulted in first exposures, showing for the first time ever 10 nm dense lines (20 nm pitch) printed in Veldhoven on metal oxide resists (MORs) using the 0.55 NA EUV prototype scanner.
Imec’s president and CEO Luc Van den hove: “High NA EUV is the next milestone in optical lithography, promising the patterning of metal lines/spaces with 20 nm pitch in one single exposure and enabling next generations of DRAM chips. This will improve yield and reduce cycle time and even CO2 emissions compared to existing multi-patterning 0.33 NA EUV schemes. It will therefore be a key enabler to push Moore’s Law well into the ångström era. We are now thrilled to explore these capabilities in real life, using the prototype High NA EUV scanner. For imec and its partners, the High NA EUV Lithography Lab will act as a virtual extension of our 300 mm cleanroom in Leuven, enabling us to further improve the patterning ecosystem and push the resolution of the High NA EUV towards its ultimate limits.”
ASML’s President and CEO Christophe Fouquet: “The ASML-imec High NA EUV Lithography Lab provides an opportunity for our EUV customers, partners and suppliers to access the High NA EUV system for process development while waiting for their own system to be available at their factories.. This type of very early engagement with the ecosystem is unique and could significantly accelerate the learning curve on the technology and smoothen the introduction in manufacturing. We are committed to work with and support our customers in this journey with High NA EUV.”
