The Saras Tile, or STILE, enables power regulation from system board to package. In-package power delivery frees up board real estate by allowing the package to be placed on the back of the PCB, said Bart DeProspo, senior director of business development at Saras Micro Devices.
The company develops customised, integrated passive modules based on a 3D structure which provides a centralised, vertical power delivery. It claimed that the superior capacitance density enables fewer total function-specific devices to boost efficiency. Embedding the vertical power delivery in the substrate core minimises the length of the power path and reduces losses in redistribution layers, said the company.
Freeing up real estate enables higher levels of chiplet integration for the package to support the growing number of power rails being included within the package.
The 3D structure provides a centralised, vertical power delivery, particularly for inference and timing applications. According to Saras, this approach “significantly reduces” the number of separate components needed while supporting “the most advanced high-power computing and AI applications”.
Package sizes range from 1.0mm x 1.0mm to 20mm x 20mm and are designed for integration into any organic substrate, regardless of silicon or package size, added the company.
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