The SPD data is used by a system’s BIOS to properly initialise and optimise memory channels.
The annual release – this is version 1.4 – adds support for memory modules executing up to DDR5-9200 speeds.
There are also codes for the new Small Outline Compression Attached Memory Modules (SOCAMM2). And this version expands error logging information. Specifically, for Multiplexed Rank Dual In-Line Memory Modules (MRDIMMs).
DDR5
“JEDEC is responsive to the expanding success of DDR5 memories in the industry with faster speeds and more memory module configurations,” said Mian Quddus, Chairman of the JEDEC Board of Directors.
“The collaborative efforts of the many suppliers of these memories in the annual release of the SPD Contents standard helps ensure consistency in these memory solutions.”
Download
A free download, and more information, is available from the JEDEC Solid State Technology Association’s website.
The standard applies for all DDR5 memory modules. For example, from traditional Dual In-line Memory Modules (DIMMs) to solder-down motherboard applications.
Dating from 1958, JEDEC develops standards for the microelectronics industry. With 360 member companies it has more than 100 JEDEC technical committees and task groups.
Image: Samsung Electronics – 16Gb DDR5 DRAM
See also: JEDEC publishes new CAMM2 memory module standard
