Four Focus Sessions on topics of intense research interest are:
- 3D Stacking for Next-Generation Logic & Memory by Wafer Bonding and Related Technologies
- Logic, Package and System Technologies for Future Generative AI
- Neuromorphic Computing for Smart Sensors
- Sustainability in Semiconductor Device Technology and Manufacturing
The technical programme will consist of more than 225 presentations plus a full slate of panels, Focus Sessions, Tutorials, Short Courses, a career luncheon, supplier exhibit and IEEE/EDS award presentations.
“The IEDM offers valuable insights into where the industry is headed, because the leading-edge work presented at the conference showcases major trends and paradigm shifts in key semiconductor technologies,” said Jungwoo Joh, IEDM 2023 Publicity Chair and Process Development Manager at Texas Instruments. “For example, this year many papers discuss ways to stack devices in 3D configurations. This is of course not new, but two things are especially noteworthy about this work. One is that it isn’t just happening with conventional logic and memory devices, but with sensors, power, neuromorphic and other devices as well. Also, many papers don’t describe futuristic laboratory studies, but rather specific hardware demonstrations that have generated solid results, opening pathways to commercial feasibility.”
“Finding the right materials and device configurations to develop transistors that will perform well with acceptable levels of reliability remains a key challenge,” said Kang-ill Seo, IEDM 2023 Publicity Vice Chair and Vice President, Semiconductor R&D, Samsung Semiconductor. “This year’s program shows that electrothermal considerations remain a key focus, particularly with attempts to add functionality to a chip’s interconnect, or wiring, which is fabricated using low-temperature processes.”
Here are details of the 2023 IEEE International Electron Devices Meeting:
Tutorial Sessions – Saturday, Dec. 9
The Saturday tutorial sessions on emerging technologies are presented by experts in the field to bridge the gap between textbook-level knowledge and leading-edge current research, and to introduce attendees to new fields of interest. There are three time slots, each with two tutorials running in parallel:
1:30 p.m. – 2:50 p.m.
- Innovative Technology for Beyond 2 nm, Matthew Metz, Intel
- CMOS+X: Functional Augmentation of CMOS for Next-Generation Electronics, Sayeef Salahuddin, UC-Berkeley
3:05 p.m. – 4:25 p.m.
- Reliability Challenges of Emerging FET Devices, Jacopo Franco, Imec
- Advanced Packaging and Heterogeneous Integration – Past, Present & Future, Madhavan Swaminathan, Penn State
4:40 p.m. – 6:00 p.m.
- Synapses, Circuits, and Architectures for Analog In-Memory Computing-Based Deep Neural Network Inference Hardware Acceleration, Irem Boybat, IBM
- Tools for Device Modeling: From SPICE to Scientific Machine Learning, Keno Fischer, JuliaHub
Short Courses – Sunday, Dec. 10
In contrast to the Tutorials, the full-day Short Courses are focused on a single technical topic. They offer the opportunity to learn about important areas and developments, and to network with global experts.
- Transistor, Interconnect, and Chiplets for Next-Generation Low-Power & High-Performance Computing, organized by Yuri Y. Masuoka, Samsung
- Advanced Technology Requirement for Edge Computing, Jie Deng, Qualcomm
- Process Technology toward 1nm and Beyond, Tomonari Yamamoto, Tokyo Electron
- Empowering Platform Technology with Future Semiconductor Device Innovation, Jaehun Jeong, Samsung
- Future Power Delivery Process Architectures and Their Capability and Impact on Interconnect Scaling, Kevin Fischer, Intel
- DTCO/STCO in the Era of Vertical Integration, YK Chong, ARM
- Low Power SOC Design Trends/3D Integration/Packaging for Mobile Applications, Milind Shah, Google
- The Future of Memory Technologies for High-Performance Memory and Computing, organized by Ki Il Moon, SK Hynix
- High-Density and High-Performance Technologies for Future Memory, Koji Sakui, Unisantis Electronics Singapore/Tokyo Institute of Technology
- Advanced Packaging Solutions for High Performance Memory and Compute, Jaesik Lee, SK Hynix
- Analog In-Memory Computing for Deep Learning Inference, Abu Sebastian, IBM
- The Next Generation of AI Architectures: The Role of Advanced Packaging Technologies in Enabling Heterogeneous Chiplets, Raja Swaminathan, AMD
- Key Challenges and Directional Path of Memory Technology for AI and High-Performance Computing, Keith Kim, NVIDIA
- Charge-Trapping Memories: From the Fundamental Device Physics to 3D Memory Architectures (3D NAND, 3D NOR, 3D DRAM) and Computing in Memory (CIM), Hang-Ting (Oliver) Lue, Macronix
Plenary Presentations – Monday, Dec. 11
- Redefining Innovation: A Journey forward in the New Dimension Era, Siyoung Choi, President & GM, Samsung Foundry Business, Device Solutions Division
- The Next Big Thing: Making Memory Magic and the Economics Beyond Moore’s Law, Thy Tran, Vice President of Global Frontend Procurement, Micron
- Semiconductor Challenges in the 5G and 6G Technology Platforms, Björn Ekelund, Corporate Research Director, Ericsson
Evening Panel Session – Tuesday evening, Dec. 12
The IEDM evening panel session is an interactive forum where experts give their views on important industry topics, and audience participation is encouraged to foster an open exchange of ideas. This year’s panel will be moderated by Dan Hutcheson, Vice Chair at Tech Insights.
- AI: Semiconductor Catalyst? Or Disrupter? Artificial Intelligence (AI) has long been a hot topic. In 2023 it became super-heated when large language models became readily available to the public. This year’s IEDM will not rehash what’s been dragged through media. Instead, it will bring together industry experts to have a conversation about how AI is changing the semiconductor industry and to ask them how they are using AI to transform their efforts. The topics will be wide-ranging, from how AI will drive demand for semiconductors, to how it’s changing design and manufacturing, and even to how it will change the jobs and careers of those working in it.
Luncheon – Tuesday, Dec. 12
There will be a career-focused luncheon featuring industry and scientific leaders talking about their personal experiences in the context of career growth. The discussion will be moderated by Jennifer Zhao,
President/CEO, asm OSRAM USA Inc. The speakers will be:
- Ilesanmi Adesida, University Provost and Acting President, Nazarbayev University, Kazakhstan — Professor Ilesanmi Adesida is a scientist/engineer and an experienced administrator in both scientific and educational circles, with more than 350 peer-reviewed articles/250 presentations at international conferences.
- Isabelle Ferain, Vice-President of Technology Development, GlobalFoundries — Dr. Ferain oversees GF’s technology development mission in its 300mm fabs in the US and Europe.
Vendor Exhibition/MRAM Poster Session/MRAM Global Innovation Forum
- A vendor exhibition will be held once again.
- A special poster session dedicated to MRAM (magnetoresistive RAM memory) will take place during the IEDM on Tuesday, Dec. 12 from 2:20 pm to 5:30 p.m., sponsored by the IEEE Magnetics Society.
- Also sponsored by the IEEE Magnetics Society, the 15th MRAM Global Innovation Forum will be held in the same venue after the IEDM conference concludes, on Thursday, Dec. 14.
For registration and other information, visit www.ieee-iedm.org.
